- Apr 24, 2023
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Juan Quintela authored
We move there all capabilities helpers from migration.c. Signed-off-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Dr. David Alan Gilbert <dgilbert@redhat.com> --- Following David advise: - looked through the history, capabilities are newer than 2012, so we can remove that bit of the header. - This part is posterior to Anthony. Original Author is Orit. Once there, I put myself. Peter Xu also did quite a bit of work here. Anyone else wants/needs to be there? I didn't search too hard because nobody asked before to be added. What do you think?
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- Apr 20, 2023
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Ninad Palsule authored
Qemu already supports devices attached to ISA and sysbus. This drop adds support for the I2C bus attached TPM devices. I2C model only supports TPM2 protocol. This commit includes changes for the common code. - Added I2C emulation model. Logic was added in the model to temporarily cache the data as I2C interface works per byte basis. - New tpm type "tpm-tis-i2c" added for I2C support. The user has to provide this string on command line. Testing: TPM I2C device module is tested using SWTPM (software based TPM package). Qemu uses the rainier machine and is connected to swtpm over the socket interface. The command to start swtpm is as follows: $ swtpm socket --tpmstate dir=/tmp/mytpm1 \ --ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \ --tpm2 --log level=100 The command to start qemu is as follows: $ qemu-system-arm -M rainier-bmc -nographic \ -kernel ${IMAGEPATH}/fitImage-linux.bin \ -dtb ${IMAGEPATH}/aspeed-bmc-ibm-rainier.dtb \ -initrd ${IMAGEPATH}/obmc-phosphor-initramfs.rootfs.cpio.xz \ -drive file=${IMAGEPATH}/obmc-phosphor-image.rootfs.wic.qcow2,if=sd,index=2 \ -net nic -net user,hostfwd=:127.0.0.1:2222-:22,hostfwd=:127.0.0.1:2443-:443 \ -chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \ -tpmdev emulator,id=tpm0,chardev=chrtpm \ -device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.12,address=0x2e Signed-off-by:
Ninad Palsule <ninad@linux.ibm.com> Reviewed-by:
Stefan Berger <stefanb@linux.ibm.com> Tested-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Joel Stanley <joel@jms.id.au> Tested-by:
Joel Stanley <joel@jms.id.au> Message-id: 20230414220754.1191476-4-ninadpalsule@us.ibm.com
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Ninad Palsule authored
Qemu already supports devices attached to ISA and sysbus. This drop adds support for the I2C bus attached TPM devices. This commit includes changes for the common code. - Added support for the new checksum registers which are required for the I2C support. The checksum calculation is handled in the qemu common code. - Added wrapper function for read and write data so that I2C code can call it without MMIO interface. The TPM TIS I2C spec describes in the table in section "Interface Locality Usage per Register" that the TPM_INT_ENABLE and TPM_INT_STATUS registers must be writable for any locality even if the locality is not the active locality. Therefore, remove the checks whether the writing locality is the active locality for these registers. Signed-off-by:
Ninad Palsule <ninad@linux.ibm.com> Signed-off-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Stefan Berger <stefanb@linux.ibm.com> Tested-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Joel Stanley <joel@jms.id.au> Tested-by:
Joel Stanley <joel@jms.id.au> Message-id: 20230414220754.1191476-3-ninadpalsule@us.ibm.com
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Guenter Roeck authored
On mcimx7d-sabre, the MDIO bus is connected to the first Ethernet interface. Set fec2-phy-connected to false to reflect this. Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-6-linux@roeck-us.net Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Guenter Roeck authored
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-5-linux@roeck-us.net Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Guenter Roeck authored
On mcimx6ul-evk, the MDIO bus is connected to the second Ethernet interface. Set fec1-phy-connected to false to reflect this. Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-4-linux@roeck-us.net Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Guenter Roeck authored
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Guenter Roeck authored
The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may be connected to separate MDIO busses, or both may be connected on the same MDIO bus using different PHY addresses. Commit 461c51ad ("Add a phy-num property to the i.MX FEC emulator") added support for specifying PHY addresses, but it did not provide support for linking the second PHY on a given MDIO bus to the other Ethernet interface. To be able to support two PHY instances on a single MDIO bus, two properties are needed: First, there needs to be a flag indicating if the MDIO bus on a given Ethernet interface is connected. If not, attempts to read from this bus must always return 0xffff. Implement this property as phy-connected. Second, if the MDIO bus on an interface is active, it needs a link to the consumer interface to be able to provide PHY access for it. Implement this property as phy-consumer. Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-2-linux@roeck-us.net Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Thomas Huth authored
There is nothing that depends on target specific macros in this file, so we can move it to the common source set to avoid that we have to compile this file multiple times (one time for each target). Message-Id: <20230413182636.139356-1-thuth@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
The target checks here are only during the initialization, so they are not performance critical. We can switch these to runtime checks to avoid that we have to compile this file multiple times during the build, and make the code ready for an universal build one day. Message-Id: <20230412163501.36770-1-thuth@redhat.com> Reviewed-by:
Fabiano Rosas <farosas@suse.de> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
Ideally, qtest.c should be independent from target specific code, so we only have to compile it once for all targets. Thus start improving the situation by moving the pseries related code to hw/ppc/spapr_rtas.c instead and allow target code to register a callback handler for such target specific commands. Message-Id: <20230411183418.1640500-2-thuth@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
The code for these two devices seems to be independent from any target specific macros. "riscv_htif.c" is used for both, riscv32 and riscv64, so by moving this to the common code source set, we can avoid to compile it twice every time. "goldfish_tty.c" is only used for one target at the moment, but since it is a paravirtualized device, it could get useful for other targets one day, so let's move it now, too. Message-Id: <20230411173206.1511621-1-thuth@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Philippe Mathieu-Daudé authored
The Cortex-A7 core is only available when TCG is enabled (see commit 80485d88 "target/arm: Restrict v7A TCG cpus to TCG accel"). Signed-off-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20230405100848.76145-3-philmd@linaro.org Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Axel Heider authored
Fix the limit check. If the limit is less than the compare value, the timer can never reach this value, thus it will never fire. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1491 Signed-off-by:
Axel Heider <axel.heider@hensoldt.net> Message-id: 168070611775.20412.2883242077302841473-2@git.sr.ht Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Axel Heider authored
Fix issue reported by Coverity. Signed-off-by:
Axel Heider <axel.heider@hensoldt.net> Message-id: 168070611775.20412.2883242077302841473-1@git.sr.ht Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Strahinja Jankovic authored
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area. Signed-off-by:
Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by:
Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Strahinja Jankovic authored
This patch adds WDT to Allwinner-A10 and Cubieboard. WDT is added as an overlay to the Timer module memory map. Signed-off-by:
Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by:
Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-3-strahinja.p.jankovic@gmail.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Strahinja Jankovic authored
This patch adds basic support for Allwinner WDT. Both sun4i and sun6i variants are supported. However, interrupt generation is not supported, so WDT can be used only to trigger system reset. Signed-off-by:
Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by:
Niek Linnenbank <nieklinnenbank@gmail.com> Tested-by:
Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-2-strahinja.p.jankovic@gmail.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Feng Jiang authored
One of the debug printfs in exynos4210_gcomp_find() will access outside the 's->g_timer.reg.comp[]' array if there was no active comparator and 'res' is -1. Add a conditional to avoid this. This doesn't happen in normal use because the debug printfs are by default not compiled in. Signed-off-by:
Feng Jiang <jiangfeng@kylinos.cn> Message-id: 20230404074506.112615-1-jiangfeng@kylinos.cn Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> [PMM: Adjusted commit message to clarify that the overrun only happens if you've enabled debug printfs] Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Stefan Weil authored
Signed-off-by:
Stefan Weil <sw@weilnetz.de> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230409200526.1156456-1-sw@weilnetz.de Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Paolo Bonzini authored
Migrate rtc_ref (which only needs to be 32-bit because it is summed to a 32-bit register), which requires bumping the migration version. The HPPA machine does not have versioned machine types so it is okay to block migration to old versions of QEMU. While at it, drop the write-only field rtc from LasiState. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini authored
The last argument to -pci_nvme_err_startfail_virt_state is always "OFFLINE" due to the enclosing "if" condition requiring !sctrl->scs. Reported by Coverity. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Cornelia Huck authored
Add 8.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by:
Cornelia Huck <cohuck@redhat.com> Message-Id: <20230314173009.152667-1-cohuck@redhat.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Thomas Huth <thuth@redhat.com> Acked-by:
Gavin Shan <gshan@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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- Apr 13, 2023
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David Woodhouse authored
Coverity spotted a double-free (CID 1508254); we g_string_free(path) and then for some reason immediately call free(path) too. We should just use g_autoptr() for it anyway, which simplifies the code a bit. Fixes: 7a8a749d ("hw/xen: Move xenstore_store_pv_console_info to xen_console.c") Signed-off-by:
David Woodhouse <dwmw@amazon.co.uk> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Apr 12, 2023
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Peter Xu authored
postcopy_qemufile_src object should be owned by one thread, either the main thread (e.g. when at the beginning, or at the end of migration), or by the return path thread (when during a preempt enabled postcopy migration). If that's not the case the access to the object might be racy. postcopy_preempt_shutdown_file() can be potentially racy, because it's called at the end phase of migration on the main thread, however during which the return path thread hasn't yet been recycled; the recycle happens in await_return_path_close_on_source() which is after this point. It means, logically it's posslbe the main thread and the return path thread are both operating on the same qemufile. While I don't think qemufile is thread safe at all. postcopy_preempt_shutdown_file() used to be needed because that's where we send EOS to dest so that dest can safely shutdown the preempt thread. To avoid the possible race, remove this only place that a race can happen. Instead we figure out another way to safely close the preempt thread on dest. The core idea during postcopy on deciding "when to stop" is that dest will send a postcopy SHUT message to src, telling src that all data is there. Hence to shut the dest preempt thread maybe better to do it directly on dest node. This patch proposed such a way that we change postcopy_prio_thread_created into PreemptThreadStatus, so that we kick the preempt thread on dest qemu by a sequence of: mis->preempt_thread_status = PREEMPT_THREAD_QUIT; qemu_file_shutdown(mis->postcopy_qemufile_dst); While here shutdown() is probably so far the easiest way to kick preempt thread from a blocked qemu_get_be64(). Then it reads preempt_thread_status to make sure it's not a network failure but a willingness to quit the thread. We could have avoided that extra status but just rely on migration status. The problem is postcopy_ram_incoming_cleanup() is just called early enough so we're still during POSTCOPY_ACTIVE no matter what.. So just make it simple to have the status introduced. One flag x-preempt-pre-7-2 is added to keep old pre-7.2 behaviors of postcopy preempt. Fixes: 93589827 ("migration: Send requested page directly in rp-return thread") Signed-off-by:
Peter Xu <peterx@redhat.com> Reviewed-by:
Juan Quintela <quintela@redhat.com> Signed-off-by:
Juan Quintela <quintela@redhat.com>
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Klaus Jensen authored
The iocb (and the allocated memory to hold LBA ranges) leaks if reading the LBA ranges fails. Fix this by adding a free and an unref of the iocb. Reported-by: Coverity (CID 1508281) Fixes: d7d1474f ("hw/nvme: reimplement dsm to allow cancellation") Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Klaus Jensen <k.jensen@samsung.com>
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Klaus Jensen authored
Coverity reports a memory leak of memory when parsing ruhids at namespace initialization. Since this is just working memory, not needed beyond the scope of the functions, fix this by adding a g_autofree annotation. Reported-by: Coverity (CID 1507979) Fixes: 73064edf ("hw/nvme: flexible data placement emulation") Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Klaus Jensen <k.jensen@samsung.com>
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- Apr 11, 2023
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Peter Maydell authored
In commit 8461bfdc we added the TYPE_AW_I2C_SUN6I, which is a minor variant of the TYPE_AW_I2C device. However, we didn't quite get the class hierarchy right. We made the new TYPE_AW_I2C_SUN6I a subclass of TYPE_SYS_BUS_DEVICE, which means that you can't validly use a pointer to this object via the AW_I2C() cast macro, which insists on having something that is an instance of TYPE_AW_I2C or some subclass of that type. This only causes a problem if QOM cast macro debugging is enabled; that is supposed to be on by default, but a mistake in the meson conversion in commit c55cf6ab meant that it ended up disabled by default, and we didn't catch this bug. Fix the problem by arranging the classes in the same way we do for TYPE_PL011 and TYPE_PL011_LUMINARY in hw/char/pl011.c -- make the variant class be a subclass of the "normal" version of the device. This was reported in https://gitlab.com/qemu-project/qemu/-/issues/1586 but this fix alone isn't sufficient, as there is a separate cast-related issue in the CXL code in pci_expander_bridge.c. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Corey Minyard <cminyard@mvista.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by:
Thomas Huth <thuth@redhat.com>
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- Apr 05, 2023
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Peter Maydell authored
This reverts commit 6da24341 ("memory: Optimize replay of guest mapping"). This change breaks the mps3-an547 board under TCG (and probably other TCG boards using an IOMMU), which now assert: $ ./build/x86/qemu-system-arm --machine mps3-an547 -serial stdio -kernel /tmp/an547-mwe/build/test.elf qemu-system-arm: ../../softmmu/memory.c:1903: memory_region_register_iommu_notifier: Assertion `n->end <= memory_region_size(mr)' failed. This is because tcg_register_iommu_notifier() registers an IOMMU notifier which covers the entire address space, so the assertion added in this commit is not correct. For the 8.0 release, just revert this commit as it is only an optimization. Fixes: 6da24341 ("memory: Optimize replay of guest mapping") Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 917c1c552b2d1b732f9a86c6a90684c3a5e4cada.1680640587.git.mst@redhat.com
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- Apr 04, 2023
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Tianrui Zhao authored
The virt addr should mask TARGET_PHYS_ADDR_SPACE_BITS to get the phys addr, and this is used by loading kernel elf. Signed-off-by:
Tianrui Zhao <zhaotianrui@loongson.cn> Acked-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230327112313.3042829-1-zhaotianrui@loongson.cn> Signed-off-by:
Song Gao <gaosong@loongson.cn>
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- Apr 03, 2023
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Chris Rauer authored
The problem is that the Linux driver expects the master transaction inhibit bit(R_SPICR_MTI) to be set during driver initialization so that it can detect the fifo size but QEMU defaults it to zero out of reset. The datasheet indicates this bit is active on reset. See page 25, SPI Control Register section: https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf Signed-off-by:
Chris Rauer <crauer@google.com> Message-id: 20230323182811.2641044-1-crauer@google.com Reviewed-by:
Edgar E. Iglesias <edgar@zeroasic.com> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Markus Armbruster authored
At this moment, arm_load_dtb() can free machine->fdt when binfo->dtb_filename is NULL. If there's no 'dtb_filename', 'fdt' will be retrieved by binfo->get_dtb(). If get_dtb() returns machine->fdt, as is the case of machvirt_dtb() from hw/arm/virt.c, fdt now has a pointer to machine->fdt. And, in that case, the existing g_free(fdt) at the end of arm_load_dtb() will make machine->fdt point to an invalid memory region. Since monitor command 'dumpdtb' was introduced a couple of releases ago, running it with any ARM machine that uses arm_load_dtb() will crash QEMU. Let's enable all arm_load_dtb() callers to use dumpdtb properly. Instead of freeing 'fdt', assign it back to ms->fdt. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Fixes: bf353ad5 ("qmp/hmp, device_tree.c: introduce dumpdtb") Reported-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Daniel Henrique Barboza <danielhb413@gmail.com> Message-id: 20230328165935.1512846-1-armbru@redhat.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Mar 30, 2023
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Titus Rwantare authored
Devices models calling pmbus_send_string can't be relied upon to send a non-zero pointer. This logs an error and doesn't segfault. Reviewed-by:
Patrick Venture <venture@google.com> Signed-off-by:
Titus Rwantare <titusr@google.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230322175513.1550412-5-titusr@google.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@linaro.org>
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Jiaxun Yang authored
145e2198 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") converted CFGADDR/CFGDATA registers to use PCI_HOST_BRIDGE's accessor facility and enabled byte swap for both CFGADDR/CFGDATA register. However CFGADDR as a ISD internal register is not controlled by MByteSwap bit, it follows endian of all other ISD register, which means it ties to little endian. Move mapping of CFGADDR out of gt64120_update_pci_cfgdata_mapping to disable endian-swapping. Fixes: 145e2198 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") Reported-by:
Nathan Chancellor <nathan@kernel.org> Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by:
Nathan Chancellor <nathan@kernel.org> Message-Id: <20230223161958.48696-1-jiaxun.yang@flygoat.com> [PMD: !!! Note this only fixes little-endian hosts !!! ] Signed-off-by:
Philippe Mathieu-Daudé <philmd@linaro.org>
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- Mar 28, 2023
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Sriram Yagnaraman authored
Add support for stripping/inserting VLAN for VFs. Had to move CSUM calculation back into the for loop, since packet data is pulled inside the loop based on strip VLAN decision for every VF. net_rx_pkt_fix_l4_csum should be extended to accept a buffer instead for igb. Work for a future patch. Signed-off-by:
Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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Sriram Yagnaraman authored
Please note that loopback counters for VM to VM traffic is not implemented yet: VFGOTLBC, VFGPTLBC, VFGORLBC and VFGPRLBC. Signed-off-by:
Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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Sriram Yagnaraman authored
RSS for VFs is only enabled if VMOLR[n].RSSE is set. Signed-off-by:
Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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Sriram Yagnaraman authored
Signed-off-by:
Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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Sriram Yagnaraman authored
Also introduce: - Checks for RXDCTL/TXDCTL queue enable bits - IGB_NUM_VM_POOLS enum (Sec 1.5: Table 1-7) Signed-off-by:
Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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Sriram Yagnaraman authored
IGB uses RXDW ICR bit to indicate that rx descriptor has been written back. This is the same as RXT0 bit in older HW. Signed-off-by:
Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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