Skip to content
Snippets Groups Projects
  1. Apr 05, 2023
  2. Apr 04, 2023
  3. Apr 03, 2023
    • Peter Maydell's avatar
      Merge tag 'pull-target-arm-20230403' of... · 51a6dc9d
      Peter Maydell authored
      Merge tag 'pull-target-arm-20230403' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
      
       * target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()
       * hw/arm: do not free machine->fdt in arm_load_dtb()
       * target/arm: Fix generated code for cpreg reads when HSTR is active
       * hw/ssi: Fix Linux driver init issue with xilinx_spi
      
      # -----BEGIN PGP SIGNATURE-----
      #
      # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmQq+CwZHHBldGVyLm1h
      # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3ux4EACRzqDTA3bbmuEDC4HKFEwv
      # p4IrhG20iZWOQaieu7B+nrhXYakkcLxtGqG0cLFbb073B16SWRAxwli1sH+5mBNW
      # l7GEF8WUelSPLZUlPmfl4YGH2ak5+kXI/G92+X7uE76Bv6wOJYZC5S1iNZN67fcd
      # fQEfb9IcSmytCvsQLfLCvYzgpJKTuuikzkoCnT9O43qpPmUsBhSsBzyYPu0ZqsjV
      # OgFMGNUc80rHc1kcLoLMMJBzI5S+iurnDKD+aNkMzCjtKPGkuIljbE6fPANXFxLb
      # KbpVYjVIpPBAC33ZGO8NTkzqBuO7VNY0xWstfmepAsOdrorTLAOVMnC2NPsSZzOz
      # kLd2wTT+64eMxt+flZETuU6HF8f6K94GRWPw8dC7Aj3XUvbSso+in863XD2OIKAr
      # MCEm2Xi8ogb14uNx9Z4pUFIU6gKNUx8OGnWPLBngF4Kix4yP56nkbRAlg2ZII5bH
      # HBny6+llC1NB94MjfSorTnNkk6J8Kd4Zhw8C9+dNbaDxCUBz3oCFwLoq6Cgx97F6
      # 4J4An4PGF4evrJWBo9+9qOKtKapXlEmCSYs7oVavabxCCLI92PVoz96QH+6OK7+c
      # h0PiqlfjPPSCnUcxsA9mr8zbp+P/ZxJbh0YI9ExP+zI03wE8gr4NMf7HYZQh0OLU
      # Q+HARsmaAG3FONWbnHE97A==
      # =oIZg
      # -----END PGP SIGNATURE-----
      # gpg: Signature made Mon 03 Apr 2023 17:00:44 BST
      # gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
      # gpg:                issuer "peter.maydell@linaro.org"
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
      # gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
      # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE
      
      * tag 'pull-target-arm-20230403' of https://git.linaro.org/people/pmaydell/qemu-arm
      
      :
        hw/ssi: Fix Linux driver init issue with xilinx_spi
        target/arm: Fix generated code for cpreg reads when HSTR is active
        hw/arm: do not free machine->fdt in arm_load_dtb()
        target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      51a6dc9d
    • Chris Rauer's avatar
      hw/ssi: Fix Linux driver init issue with xilinx_spi · a0eaa126
      Chris Rauer authored
      The problem is that the Linux driver expects the master transaction inhibit
      bit(R_SPICR_MTI) to be set during driver initialization so that it can
      detect the fifo size but QEMU defaults it to zero out of reset.  The
      datasheet indicates this bit is active on reset.
      
      See page 25, SPI Control Register section:
      https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf
      
      
      
      Signed-off-by: default avatarChris Rauer <crauer@google.com>
      Message-id: 20230323182811.2641044-1-crauer@google.com
      Reviewed-by: default avatarEdgar E. Iglesias <edgar@zeroasic.com>
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      a0eaa126
    • Peter Maydell's avatar
      target/arm: Fix generated code for cpreg reads when HSTR is active · 782781e8
      Peter Maydell authored
      In commit 049edada we added some code to handle HSTR_EL2 traps, which
      we did as an inline "conditionally branch over a
      gen_exception_insn()".  Unfortunately this fails to take account of
      the fact that gen_exception_insn() will set s->base.is_jmp to
      DISAS_NORETURN.  That means that at the end of the TB we won't
      generate the necessary code to handle the "branched over the trap and
      continued normal execution" codepath.  The result is that the TCG
      main loop thinks that we stopped execution of the TB due to a
      situation that only happens when icount is enabled, and hits an
      assertion. Explicitly set is_jmp back to DISAS_NEXT so we generate
      the correct code for when execution continues past this insn.
      
      Note that this only happens for cpreg reads; writes will call
      gen_lookup_tb() which generates a valid end-of-TB.
      
      Fixes: 049edada ("target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1")
      Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1551
      
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-id: 20230330101900.2320380-1-peter.maydell@linaro.org
      782781e8
    • Markus Armbruster's avatar
      hw/arm: do not free machine->fdt in arm_load_dtb() · 12148d44
      Markus Armbruster authored
      
      At this moment, arm_load_dtb() can free machine->fdt when
      binfo->dtb_filename is NULL. If there's no 'dtb_filename', 'fdt' will be
      retrieved by binfo->get_dtb(). If get_dtb() returns machine->fdt, as is
      the case of machvirt_dtb() from hw/arm/virt.c, fdt now has a pointer to
      machine->fdt. And, in that case, the existing g_free(fdt) at the end of
      arm_load_dtb() will make machine->fdt point to an invalid memory region.
      
      Since monitor command 'dumpdtb' was introduced a couple of releases
      ago, running it with any ARM machine that uses arm_load_dtb() will
      crash QEMU.
      
      Let's enable all arm_load_dtb() callers to use dumpdtb properly. Instead
      of freeing 'fdt', assign it back to ms->fdt.
      
      Cc: Peter Maydell <peter.maydell@linaro.org>
      Cc: qemu-arm@nongnu.org
      Fixes: bf353ad5 ("qmp/hmp, device_tree.c: introduce dumpdtb")
      Reported-by: default avatarMarkus Armbruster <armbru@redhat.com>
      Signed-off-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Signed-off-by: default avatarMarkus Armbruster <armbru@redhat.com>
      Reviewed-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Message-id: 20230328165935.1512846-1-armbru@redhat.com
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      12148d44
    • Philippe Mathieu-Daudé's avatar
      target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask() · b15bdc96
      Philippe Mathieu-Daudé authored
      
      aarch64_gdb_get_pauth_reg() -- although disabled since commit
      5787d17a ("target/arm: Don't advertise aarch64-pauth.xml to
      gdb") is still compiled in. It calls pauth_ptr_mask() which is
      located in target/arm/tcg/pauth_helper.c, a TCG specific helper.
      
      To avoid a linking error when TCG is not enabled:
      
        Undefined symbols for architecture arm64:
          "_pauth_ptr_mask", referenced from:
              _aarch64_gdb_get_pauth_reg in target_arm_gdbstub64.c.o
        ld: symbol(s) not found for architecture arm64
        clang: error: linker command failed with exit code 1 (use -v to see invocation)
      
      - Inline pauth_ptr_mask() in aarch64_gdb_get_pauth_reg()
        (this is the single user),
      - Rename pauth_ptr_mask_internal() as pauth_ptr_mask() and
        inline it in "internals.h",
      
      Fixes: e995d5cc ("target/arm: Implement gdbstub pauth extension")
      Suggested-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarFabiano Rosas <farosas@suse.de>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
      Message-id: 20230328212516.29592-1-philmd@linaro.org
      [PMM: reinstated doc comment]
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      b15bdc96
  4. Mar 30, 2023
  5. Mar 29, 2023
    • Peter Maydell's avatar
      Merge tag 'pull-tcg-20230328' of https://gitlab.com/rth7680/qemu into staging · f00506ae
      Peter Maydell authored
      Use a local version of GTree [#285]
      Fix page_set_flags vs the last page of the address space [#1528]
      Re-enable gdbstub breakpoints under KVM
      
      # -----BEGIN PGP SIGNATURE-----
      #
      # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQjcLIdHHJpY2hhcmQu
      # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8rkgf/ZazodovRKxfaO622
      # mGW7ywIm+hIZYmKC7ObiMKFrBoCyeXH9yOLSx42T70QstWvBMukjovLMz1+Ttbo1
      # VOvpGH2B5W76l3i+muAlKxFRbBH2kMLTaL+BXtkmkL4FJ9bS8WiPApsL3lEX/q2E
      # 3kqaT3N3C09sWO5oVAPGTUHL0EutKhOar2VZL0+PVPFzL3BNPhnQH9QcbNvDBV3n
      # cx3GSXZyL7Plyi+qwsKf/3Jo+F2wr2NVf3Dqscu9T1N1kI5hSjRpwqUEJzJZ5rei
      # ly/gBXC/J7+WN+x+w2JlN0kWXWqC0QbDfZnj96Pd3owWZ7j4sT9zR5fcNenecxlR
      # 38Bo0w==
      # =ysF7
      # -----END PGP SIGNATURE-----
      # gpg: Signature made Tue 28 Mar 2023 23:56:50 BST
      # gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
      # gpg:                issuer "richard.henderson@linaro.org"
      # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
      # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F
      
      * tag 'pull-tcg-20230328' of https://gitlab.com/rth7680/qemu
      
      :
        softmmu: Restore use of CPU watchpoint for all accelerators
        softmmu/watchpoint: Add missing 'qemu/error-report.h' include
        softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel
        linux-user/arm: Take more care allocating commpage
        include/exec: Change reserved_va semantics to last byte
        linux-user: Pass last not end to probe_guest_base
        accel/tcg: Pass last not end to tb_invalidate_phys_range
        accel/tcg: Pass last not end to tb_invalidate_phys_page_range__locked
        accel/tcg: Pass last not end to page_collection_lock
        accel/tcg: Pass last not end to PAGE_FOR_EACH_TB
        accel/tcg: Pass last not end to page_reset_target_data
        accel/tcg: Pass last not end to page_set_flags
        linux-user: Diagnose misaligned -R size
        tcg: use QTree instead of GTree
        util: import GTree as QTree
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      f00506ae
    • Philippe Mathieu-Daudé's avatar
      softmmu: Restore use of CPU watchpoint for all accelerators · 87e303de
      Philippe Mathieu-Daudé authored
      
      CPU watchpoints can be use by non-TCG accelerators.
      
      KVM uses them:
      
        $ git grep CPUWatchpoint|fgrep kvm
        target/arm/kvm64.c:1558:        CPUWatchpoint *wp = find_hw_watchpoint(cs, debug_exit->far);
        target/i386/kvm/kvm.c:5216:static CPUWatchpoint hw_watchpoint;
        target/ppc/kvm.c:443:static CPUWatchpoint hw_watchpoint;
        target/s390x/kvm/kvm.c:139:static CPUWatchpoint hw_watchpoint;
      
      See for example commit e4482ab7 ("target-arm: kvm - add support
      for HW assisted debug"):
      
           This adds basic support for HW assisted debug. The ioctl interface
           to KVM allows us to pass an implementation defined number of break
           and watch point registers. [...]
      
      This partially reverts commit 2609ec28.
      
      Fixes: 2609ec28 ("softmmu: Extract watchpoint API from physmem.c")
      Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
      Message-Id: <20230328173117.15226-4-philmd@linaro.org>
      Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      87e303de
Loading