Skip to content
Snippets Groups Projects
Commit 3cce09e5 authored by Drew Fustini's avatar Drew Fustini
Browse files

RISC-V: Add support for sqoscfg CSR

Add support for the sqoscfg CSR defined in the Ssqosid ISA extension
(Supervisor-mode Quality of Service ID). The CSR contains two fields:

  - Resource Control ID (RCID) used determine resource allocation
  - Monitoring Counter ID (MCID) used to track resource usage

Requests from a hart to shared resources like cache will be tagged with
these IDs. This allows the usage of shared resources to be associated
with the task currently running on the hart.

A sqoscfg field is added to thread_struct and has the same format as the
sqoscfg CSR. This allows the scheduler to set the hart's sqoscfg CSR to
contain the RCID and MCID for the task that is being scheduled in. The
sqoscfg CSR is only written to if the thread_struct.sqoscfg is different
than the current value of the CSR.

A per-cpu variable cpu_sqoscfg is used to mirror that state of the CSR.
This is because access to L1D hot memory should be several times faster
than a CSR read. Also, in the case of virtualization, accesses to this
CSR are trapped in the hypervisor.

Link: https://github.com/riscv-non-isa/riscv-cmqri/blob/main/riscv-cbqri.pdf


Co-developed-by: default avatarKornel Dulęba <mindal@semihalf.com>
Signed-off-by: default avatarKornel Dulęba <mindal@semihalf.com>
Signed-off-by: default avatarDrew Fustini <dfustini@baylibre.com>
---
Note:
- A version of this patch rebased on riscv/for-next was already
  submitted as an RFC to linux-riscv [1] with Message-ID:
    20230410043646.3138446-1-dfustini@baylibre.com
- This patch is included in this RFC series so as to provide a cohesive
  demonstration in one series.

[1] https://lore.kernel.org/lkml/20230410043646.3138446-1-dfustini@baylibre.com/
parent 7ac3693a
No related branches found
No related tags found
No related merge requests found
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment