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x86/entry: Add kernel IBRS implementation
Implement Kernel IBRS - currently the only known option to mitigate RSB underflow speculation issues on Skylake hardware. Note: since IBRS_ENTER requires fuller context established than UNTRAIN_RET, it must be placed after it. However, since UNTRAIN_RET itself implies a RET, it must come after IBRS_ENTER. This means IBRS_ENTER needs to also move UNTRAIN_RET. Note 2: KERNEL_IBRS is sub-optimal for XenPV. Signed-off-by:Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by:
Borislav Petkov <bp@suse.de> Reviewed-by:
Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by:
Borislav Petkov <bp@suse.de>
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- arch/x86/entry/calling.h 58 additions, 0 deletionsarch/x86/entry/calling.h
- arch/x86/entry/entry_64.S 39 additions, 5 deletionsarch/x86/entry/entry_64.S
- arch/x86/entry/entry_64_compat.S 13 additions, 4 deletionsarch/x86/entry/entry_64_compat.S
- arch/x86/include/asm/cpufeatures.h 1 addition, 1 deletionarch/x86/include/asm/cpufeatures.h
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