Provide an UEFI application to save the initial RAM disk provided by U-Boot
via the Load File2 protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>

If we are using ACPI tables instead of a device tree, we don't need the
dtbdump.efi test tool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Before overwriting an existing file ask the user.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. It was however required to run the UEFI Self Certification Test
(SCT) II, version 2.6, 2017. So we implemented it for the sole purpose of
running the SCT.

As the SCT does not need the protocol anymore it is time for removal.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Allow the EFI_DEVICE_PATH_UTILITIES_PROTOCOL to be disabled via
configuration.

On systems that are very tight on U-Boot image size we may want to disable
the protocol. As it is required to run the UEFI Shell enable it by default.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Allow EFI_DT_FIXUP_PROTOCOL to be disabled via configuration.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Avoid a forward declaration.

Add a missing function description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Some boards are very tight on the binary size. Booting via UEFI is possible
without using the boot manager.

Provide a configuration option to make the boot manager available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Move all load options related functions to a new module. So that they can
be compiled independently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

- Assorted MediaTek, AST2x00 updates
- Assorted driver fixes for various platforms
- Keymile platform updates
- Add pwm command, mp5416 pmic driver

The input system clock for mt7622 timer is 10MHz and can be retrieved
through the clk driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

The timer being used by this driver may have already been used by first
stage bootloader (e.g. ATF/preloader), and it's settings may differ from
what this driver is going to use.

This may cause issues, such as inaccurate timer frequency due to
incorrect clock divider.

This patch adds the initialization code to avoid them.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>

drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write()
and mw_eeprom_read() have incorrect loop conditions:

	while (len <= 2) {

CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Avoid calling free(addr) twice if the device for ucode is not found.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Update branch and version information of ATF and DDR firmware files to
point to latest releases provided by NXP.

This is especially critical for imx8mp evk, as the ATF support for that
SoC is only available in latest releases.

Align all SoCs from imx8m family to use identical revisions of ATF and
DDR firmware.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Calling calloc() for 0 members does not make any sense.
Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally
unreasonable.

The current code will lead to a NULL dereference in bcm6348_iudma_enable().

The assignments for ch_priv->busy_desc are obviously swapped.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Add the default configuration for the AST2600 EVB.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>

Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.

However, currently the patch supports only the booting from
memory-mapped SPI flash.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>

AST2600 is the 7th generation of Aspeed SoC designated for
Interated Remote Management Processor.

AST2600 has significant performance improvement by integrating
1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the
controllers are also improved with more features and better
performance than preceding AST24xx/AST25xx.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>

Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>

AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.

A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>

AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600.
The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb),
512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>

This patch adds the clock control driver
for the AST2600 SoC.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>

Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h

Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Add Cortina Access parallel Nand support for CAxxxx SOCs

Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
CC: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>

Disable some unneeded config options and adapt the ident string.

CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>

Our kirkwood device embeds a USB host controller that is now used
on some boards. This enables the support of USB and the corresponding
driver.

Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>

The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h by proxy. This file does not exist for the ARM
architecture and thus code compilation failed when using this
driver on ARM.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
QEMU.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>

Add the topckgen, apmixedsys and infracfg clock driver for the MT8183
SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>

mkimage is only able to package aarch32 binaries. Add support for
AArch64 images.

One can create a ARM64 image using the following command line:
mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1"
-d bl2.bin bl2.img

Signed-off-by: Fabien Parent <fparent@baylibre.com>

Enable fastboot commands for mt8516 pumpkin board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>

Enable USB gadget on pumpkin. This requires to also enable
BOARD_LATE_INIT since the init is done in board_late_init function.

Signed-off-by: Fabien Parent <fparent@baylibre.com>

Initialize USB device on pumpkin if it is enabled in the config.

Signed-off-by: Fabien Parent <fparent@baylibre.com>

Enable the USB port for MT8516 Pumpkin Board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>