From 0ef072dc5cb9ef718f3c96aec378ee5f4e7b28c6 Mon Sep 17 00:00:00 2001
From: Nicolas Pitre <npitre@baylibre.com>
Date: Tue, 13 Jun 2023 12:51:23 -0400
Subject: [PATCH] cbqri: quick hack to allow modifications of monitor counter
values
The last 64-bit word of a 4K I/O mapping (i.e. offset = 4096 - 8) can be
written to in order to change the value of an active monitor counter.
The lower 12 bits of the written value must contain the counter's MCID
and the remainder bits the desired counter value.
---
hw/riscv/cbqri_bandwidth.c | 17 +++++++++++++++++
hw/riscv/cbqri_capacity.c | 16 ++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/hw/riscv/cbqri_bandwidth.c b/hw/riscv/cbqri_bandwidth.c
index 27874c6c3c7..661c030782c 100644
--- a/hw/riscv/cbqri_bandwidth.c
+++ b/hw/riscv/cbqri_bandwidth.c
@@ -384,6 +384,20 @@ static void riscv_cbqri_bc_write_bw_alloc(RiscvCbqriBandwidthState *bc,
}
}
+static void riscv_cbqri_bc_write_counter_quickhack(RiscvCbqriBandwidthState *bc,
+ uint64_t value)
+{
+ uint32_t mcid = value & 0xfff;
+ if (mcid >= bc->nb_mcids) {
+ return;
+ }
+
+ if (bc->mon_counters[mcid].active) {
+ bc->mon_counters[mcid].ctr_val = value >> 12;
+ }
+}
+
+
static void riscv_cbqri_bc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
@@ -393,6 +407,9 @@ static void riscv_cbqri_bc_write(void *opaque, hwaddr addr,
assert(size == 8);
switch (addr) {
+ case (4 * 1024 - 8):
+ riscv_cbqri_bc_write_counter_quickhack(bc, value);
+ break;
case A_BC_CAPABILITIES:
/* read-only register */
break;
diff --git a/hw/riscv/cbqri_capacity.c b/hw/riscv/cbqri_capacity.c
index db11a3c3fc5..06b12898d67 100644
--- a/hw/riscv/cbqri_capacity.c
+++ b/hw/riscv/cbqri_capacity.c
@@ -373,6 +373,19 @@ static void riscv_cbqri_cc_write_alloc_ctl(RiscvCbqriCapacityState *cc,
cc->cc_alloc_ctl = value;
}
+static void riscv_cbqri_cc_write_counter_quickhack(RiscvCbqriCapacityState *cc,
+ uint64_t value)
+{
+ uint32_t mcid = value & 0xfff;
+ if (mcid >= cc->nb_mcids) {
+ return;
+ }
+
+ if (cc->mon_counters[mcid].active) {
+ cc->mon_counters[mcid].ctr_val = value >> 12;
+ }
+}
+
static void riscv_cbqri_cc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
@@ -382,6 +395,9 @@ static void riscv_cbqri_cc_write(void *opaque, hwaddr addr,
assert(size == 8);
switch (addr) {
+ case (4 * 1024 - 8):
+ riscv_cbqri_cc_write_counter_quickhack(cc, value);
+ break;
case A_CC_CAPABILITIES:
/* read-only register */
break;
--
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