From bd13f847dfde260ebc4bc033a2d72149bc0ac5fa Mon Sep 17 00:00:00 2001
From: James Morse <james.morse@arm.com>
Date: Tue, 14 Sep 2021 17:57:42 +0100
Subject: [PATCH] untested: iommu/arm-smmu-v3: Add mpam helpers to query and
set state
To allow an iommu_group to be moved between resctrl groups as if it
were a CPU thread, the mpam driver needs to be able to set the partid
and pmg for the iommu_group.
Use the properties in the STE, as these only apply to one stream.
The MPAM driver also needs to know the maximum partid and pmg
values that the SMMU can generate. This allows it to determine
the system-wide common supported range of values. Add a helper
to return this id register.
Signed-off-by: James Morse <james.morse@arm.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 85 +++++++++++++++++++++
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 ++
drivers/iommu/iommu.c | 6 ++
include/linux/iommu.h | 7 ++
4 files changed, 105 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 97fc2103bbf99..835929e59e55b 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -2829,6 +2829,57 @@ static int arm_smmu_def_domain_type(struct device *dev)
if (IS_HISI_PTT_DEVICE(pdev))
return IOMMU_DOMAIN_IDENTITY;
}
+
+ return 0;
+}
+
+static int arm_smmu_group_set_mpam(struct iommu_group *group, u16 partid,
+ u8 pmg)
+{
+ int i;
+ u32 sid;
+ __le64 *step;
+ unsigned long flags;
+ struct iommu_domain *domain;
+ struct arm_smmu_device *smmu;
+ struct arm_smmu_master *master;
+ struct arm_smmu_cmdq_batch cmds;
+ struct arm_smmu_domain *smmu_domain;
+ struct arm_smmu_cmdq_ent cmd = {
+ .opcode = CMDQ_OP_CFGI_STE,
+ .cfgi = {
+ .leaf = true,
+ },
+ };
+
+ domain = iommu_get_domain_for_group(group);
+ smmu_domain = to_smmu_domain(domain);
+ if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_MPAM))
+ return -EIO;
+ smmu = smmu_domain->smmu;
+
+ cmds.num = 0;
+
+ spin_lock_irqsave(&smmu_domain->devices_lock, flags);
+ list_for_each_entry(master, &smmu_domain->devices, domain_head) {
+ for (i = 0; i < master->num_streams; i++) {
+ sid = master->streams[i].id;
+ step = arm_smmu_get_step_for_sid(smmu, sid);
+
+ /* These need locking if the VMSPtr is ever used */
+ step[4] = FIELD_PREP(STRTAB_STE_4_PARTID, partid);
+ step[5] = FIELD_PREP(STRTAB_STE_5_PMG, pmg);
+
+ cmd.cfgi.sid = sid;
+ arm_smmu_cmdq_batch_add(smmu, &cmds, &cmd);
+ }
+
+ master->partid = partid;
+ master->pmg = pmg;
+ }
+ spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
+
+ arm_smmu_cmdq_batch_submit(smmu, &cmds);
return 0;
}
@@ -2844,6 +2895,38 @@ static void arm_smmu_remove_dev_pasid(struct device *dev, ioasid_t pasid)
arm_smmu_sva_remove_dev_pasid(domain, dev, pasid);
}
+static int arm_smmu_group_get_mpam(struct iommu_group *group, u16 *partid,
+ u8 *pmg)
+{
+ int err = -EINVAL;
+ unsigned long flags;
+ struct iommu_domain *domain;
+ struct arm_smmu_master *master;
+ struct arm_smmu_domain *smmu_domain;
+
+ domain = iommu_get_domain_for_group(group);
+ smmu_domain = to_smmu_domain(domain);
+ if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_MPAM))
+ return -EIO;
+
+ if (!partid && !pmg)
+ return 0;
+
+ spin_lock_irqsave(&smmu_domain->devices_lock, flags);
+ master = list_first_entry_or_null(&smmu_domain->devices,
+ typeof(*master), domain_head);
+ if (master) {
+ if (partid)
+ *partid = master->partid;
+ if (pmg)
+ *pmg = master->pmg;
+ err = 0;
+ }
+ spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
+
+ return err;
+}
+
static struct iommu_ops arm_smmu_ops = {
.capable = arm_smmu_capable,
.domain_alloc = arm_smmu_domain_alloc,
@@ -2855,6 +2938,8 @@ static struct iommu_ops arm_smmu_ops = {
.remove_dev_pasid = arm_smmu_remove_dev_pasid,
.dev_enable_feat = arm_smmu_dev_enable_feature,
.dev_disable_feat = arm_smmu_dev_disable_feature,
+ .get_group_qos_params = arm_smmu_group_get_mpam,
+ .set_group_qos_params = arm_smmu_group_set_mpam,
.page_response = arm_smmu_page_response,
.def_domain_type = arm_smmu_def_domain_type,
.pgsize_bitmap = -1UL, /* Restricted during device attach */
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 0770198e217be..f460fbb7d954e 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -232,6 +232,7 @@
#define STRTAB_STE_1_S1CSH GENMASK_ULL(7, 6)
#define STRTAB_STE_1_S1STALLD (1UL << 27)
+#define STRTAB_STE_1_S1MPAM (1UL << 26)
#define STRTAB_STE_1_EATS GENMASK_ULL(29, 28)
#define STRTAB_STE_1_EATS_ABT 0UL
@@ -261,6 +262,10 @@
#define STRTAB_STE_3_S2TTB_MASK GENMASK_ULL(51, 4)
+#define STRTAB_STE_4_PARTID GENMASK_ULL(31, 16)
+
+#define STRTAB_STE_5_PMG GENMASK_ULL(7, 0)
+
/*
* Context descriptors.
*
@@ -702,6 +707,8 @@ struct arm_smmu_master {
bool iopf_enabled;
struct list_head bonds;
unsigned int ssid_bits;
+ u16 partid;
+ u8 pmg;
};
/* SMMU private data for an IOMMU domain */
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 10db680acaed5..dd441cfbbae4c 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -2110,6 +2110,12 @@ struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
}
EXPORT_SYMBOL_GPL(iommu_get_domain_for_dev);
+struct iommu_domain *iommu_get_domain_for_group(struct iommu_group *group)
+{
+ return group->domain;
+}
+EXPORT_SYMBOL_GPL(iommu_get_domain_for_group);
+
/*
* For IOMMU_DOMAIN_DMA implementations which already provide their own
* guarantees that the group and its default domain are valid and correct.
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 6595454d4f48d..7d53bb771f9d2 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -271,6 +271,12 @@ struct iommu_ops {
int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
+ /* Per group IOMMU features */
+ int (*get_group_qos_params)(struct iommu_group *group, u16 *partition,
+ u8 *perf_mon_grp);
+ int (*set_group_qos_params)(struct iommu_group *group, u16 partition,
+ u8 perf_mon_grp);
+
int (*page_response)(struct device *dev,
struct iommu_fault_event *evt,
struct iommu_page_response *msg);
@@ -469,6 +475,7 @@ extern void iommu_detach_device(struct iommu_domain *domain,
extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
struct device *dev, ioasid_t pasid);
extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
+extern struct iommu_domain *iommu_get_domain_for_group(struct iommu_group *group);
extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
--
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