diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index 4e05802b6ff1a6db06b5862d2bc60936cce6520b..5334500ef6a7c10be4330b5dd5b5c82f2045d4e1 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -21,19 +21,10 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_phys_sdram_size(phys_size_t *size)
 {
-	const fdt64_t *val;
-	int offset;
-	int len;
-
-	/* get size from dt which SPL updated per EEPROM config */
-	offset = fdt_path_offset(gd->fdt_blob, "/memory");
-	if (offset < 0)
+	if (!size)
 		return -EINVAL;
 
-	val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
-	if (len < sizeof(*val) * 2)
-		return -EINVAL;
-	*size = get_unaligned_be64(&val[1]);
+	*size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index d9a86a62ed0843095a0b96ea283c2046d35ff563..455a8d0187d872ba1e14259f6cf9edc71f84ddbf 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -83,7 +83,7 @@
 
 /* SDRAM configuration */
 #define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE			SZ_1G /* 1GB DDR */
+#define PHYS_SDRAM_SIZE			SZ_4G
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
 /* UART */
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
index e7bfcd70af2cdefafd0dedc9c667ace2cf80f309..401084c16b6ff1e27acbf1d209a525b3cf8313da 100644
--- a/include/configs/imx8mn_venice.h
+++ b/include/configs/imx8mn_venice.h
@@ -80,7 +80,7 @@
 
 /* SDRAM configuration */
 #define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE			SZ_1G
+#define PHYS_SDRAM_SIZE			SZ_4G
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
 /* UART */